1. Field of the Invention
The present invention generally relates to detection of a logical signal, and more specifically to a system and associated method for identifying and improving a logical signal.
2. Description of Related Art
Persons of ordinary skill in the art understand terms and basic concepts related to microelectronics that are used in this disclosure, such as “voltage,” “current,” “signal,” “load,” “logical signal,” “clock,” “trip point,” “inverter,” “buffer” “node,” “transmission line,” “characteristic impedance,” “input impedance,” “output impedance,” “XOR gate,” “DFF (data flip flop),” “digital-to-analog converter,” and “multiplexer.” Terms and basic concepts like these are apparent to those of ordinary skill in the art and thus will not be explained in detail here.
A schematic diagram of a logical signal transmission system 100 is shown in FIG. 1. The system 100 comprises: a driver circuit 110 comprising an inverter 111 receiving a logical signal D and outputting a source voltage VS to a first circuit node 121; a load 130 comprising a data detector 131 for receiving a load voltage VL from a second circuit node 122; and a transmission line 120 of characteristic impedance Z0 for providing coupling between the first circuit node 121 and the second circuit node 122. The logical signal D is transmitted by the driver circuit 110 to reach the load 130 via the transmission line 120, resulting in the load voltage VL that is meant to be representing an inversion of the logical signal D. To ensure good quality of signal transmission, the output impedance of the driver circuit 110, denoted as ZS in FIG. 1, is configured to be approximately equal to the characteristic impedance Z0, and also the input impedance of the receiver 130, denoted as ZL in FIG. 1, is configured to be approximately equal to the characteristic impedance Z0. In practice, there are always some parasitic capacitances (not shown in FIG. 1, but obvious to those of ordinary skill in the art) present in the transmission path. Said parasitic capacitances introduce inter-symbol interference and degrades signal integrity for the load voltage VL and adversely increase a probability of error of data detection by the data detector 131.
What are desired is a method and apparatus for ameliorating a logical signal.